Easily identify nets with inconsistencies between the signal and return paths and quickly find the cause in real-ime while you design without waiting for the SI engineer to perform analysis and provide feedback.
Other content in this Stream
On-Demand Webinar: What's New in OrCAD 17.4
Get a first look at what’s new in the latest release. With a singular focus on improving your design experience and productivity this release provides a host of new capabilities and enhancements...
DFM: Integrated Manufacturing Constraints
Manufacturing rules are managed as constraints in the familiar constraints manager, coexisting independently with electrical rules which can have more or less constrictive constraints.
Real-Time Coupling Analysis
Easily and quickly identify coupling issues without always having to rely on the SI expert.
Allegro PCB Crosstalk Vision
Identify and fix crosstalk issues in real-time without ever leaving your PCB design environment.
DRC Browser
Double check your DFM rules before signoff with a forced batch check of all rules for your whole design. If you do find something awry, it’s easy to locate and fix in your design.
DFF Rules
Check for common copper and component spacing issues that could potentially derail manufacturing and cause a respin.
DFM Wizard
Easily create and assign constraints for manufacturing based on IPC standards and common PCB rules.
Configure Backdrilling in Padstack Editor
Remove unused sections of plated through holes in high-speed designs to improve signal integrity on your designs.
Z-Axis and Package Pin Delay
Measure from true signal origin to end point through vias and through packages, not just the etch, so you can get timing right and ensure signal performance.
Real-Time Placement Analysis
Visual indicators of length constraints help you meet delay propagation and total etch length goals when placing components.
Real-Time Route Analysis
Real-time interactive checks help you easily find and fix common route quality issues that manufacturing DRC signoff checks miss.
Automated Backdrilling
Remove unused sections of plated through holes in high-speed designs to improve signal integrity on your designs.
Real-Time Dynamic Differential Pair Routing
Easily meet length and phase pin-to-pin constraints as traces bend without creating electrical issues.
Real-Time Impedance Analysis
Easily and quickly identify impedance discontinuity issues visually, without simulation models or extensive signal integrity expertise.
Real-Time Design for Manufacturability (DFM)
Post-design DFM checks are too late. Even if you’re able to find a mistake, you’re going to lose hours, days, even weeks adjusting your design. OrCAD gives you the full DFM, Design for Fabrication...
Let's Get Flexible: Expert Tips for Designing Flex PCBs
Flex PCB design has many advantages. In fact, the global market for flex/rigid-flex boards more than doubled in the past 4 years alone. Along with those benefits come new design challenges that...
Slideshow: Allegro PCB Release 17.2 QIR5 Updates
As part of our continuous improvement commitment Cadence regularly releases innovative new technology in the form of quarterly incremental releases (QIR). See whats new in QIR 5.
Slideshow: Allegro DesignTrue DFM Overview
Allegro DesignTrue DFM technology provides real-time manufacturing checking to the PCB design process. Why wait to find all your DFM issues at the end when you can be resolving them while you design.