With Sigrity Topology Explorer we can perform circuit simulation and analysis of Simple Parallel Bus Systems (part 10 of 10). In the final video of this series, we'll run circuit simulation of DDR4 SPBS using System SI and analyze simulation results, generated 2D plots, and reports. You will learn,
- How to load a project file in Topology Explorer 22.1
- How to plot and analyze results
- Analyze results against compliance standards
- Analyze jitter
- Generate a simulation report
- Save the topology
Follow along with the demo files here: https://www.ema-eda.com/wp-content/uploads/2023/03/SPBS_Part10.zip