Getting arcs equally spaced when routing a bus around a curved, flex circuit is not easy. With most routing software offering a grid-based approach, this often leads to sloppy spacing and inadequate contour routing. However, with OrCAD contour etch routing you can specify spacing between. This allows routes to be completed both uniformly and evenly spaced, all while simultaneously performing DRC checks along the way.
2:25This quick tutorial will provide step-by-step instructions on creating fanouts in OrCAD PCB Designer.
3:13This quick tutorial will provide step-by-step instructions on how to create copper planes through copper shapes, merging shapes, and Z-copy methods in OrCAD PCB Designer.
Learn how to create a workflow in OrCAD PCB Editor detailing the steps required for a specific portion of your design.
Routing dense, complex boards is a time-consuming process, but with the interactive routing capabilities in OrCAD, it no longer takes a significant time investment. This tutorial will show you how.
A quick demonstration of dynamic unused pad suppression inside of Allegro PCB Editor.
With OrCAD it is easy to manage board materials and communicate your design stack-ups effectively to your manufacturer.
See how to easily implement and verify your RF structures with our Bi-Directional interface to Agilent ADS.
Easily and quickly identify coupling issues without always having to rely on the SI expert.
Concurrent engineering and distributed design let multiple designers work on the same PCB design in real time.
In this webinar, you'll learn: Why your stackup is critical to overall design success Key elements that comprise PCB board stack-ups (power planes, balance, flex / rigid-flex, etc) Material...
Reduce component library creation time for new packages by 60-80% while simultaneously connecting ensuring your 2D and 3D component models are in always in synch.
One of the most difficult tasks in the PCB design process is routing let our experts at EMA show you tips and tricks to be successful.
Double check your DFM rules before signoff with a forced batch check of all rules for your whole design. If you do find something awry, it’s easy to locate and fix in your design.
Remove unused sections of plated through holes in high-speed designs to improve signal integrity on your designs.
Easily meet length and phase pin-to-pin constraints as traces bend without creating electrical issues.
Easily and quickly identify impedance discontinuity issues visually, without simulation models or extensive signal integrity expertise.
Easily identify nets with inconsistencies between the signal and return paths and quickly find the cause in real-ime while you design without waiting for the SI engineer to perform analysis and...
It seems almost every product these days needs to have some level of connectivity be it for end user access on their smart phone, connecting with other similar devices, or providing diagnostic...
