Allegro - Return Path DRC

You may think if your devices are operating at lower frequencies then your board is not high-speed; this not the case. This blog post helps you identify whether your PCB is considered high-speed.

In this 3-minute video, Bill Munroe, principal PCB designer in the company's Post-Silicon Group, talks about how the technology helped his team achieve 4X faster timing closure on DDR3 and DDR4...

Overview of BER analysis for DDR4 Interfaces with SystemSI.

An demonstration of BER analysis for DDR4 Interfaces with SystemsSI.

Routing DDR and high-speed bus interfaces can be one of the most daunting tasks in your design. With the new bus designer, all you need to do is simply describe the bus you are trying route and...

Get help from the PCB design experts at EMA with the tips and tricks you need to achieve highspeed PCB design success.

A sound constraint management design process helps to foster a correct-by-design approach, reduces time-to-market, and ultimately optimizes the design process—eliminating the undefined,...

Watch our 20 minute demo to see how Constraint Manager for OrCAD can help you effortlessly specific, communicate, and track design intent.

Easily meet length and phase pin-to-pin constraints as traces bend without creating electrical issues.

The inherent need to address signal quality challenges is no longer limited to just high-end, high-speed, signal integrity experts. OrCAD provides an integrated analysis environment with powerful...