High Speed Design

  • 4X Faster Timing Closure on Memory Subsystems with Allegro TimingVision Environment

    4X Faster Timing Closure on Memory Subsystems with Allegro TimingVision Environment

    In this 3-minute video, Bill Munroe, principal PCB designer in the company's Post-Silicon Group, talks about how the technology helped his team achieve 4X faster timing closure on DDR3 and DDR4...

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  • Allegro - Return Path DRC1:48

    Allegro - Return Path DRC

    Allegro analyzes your design to provide real-time insights and feedback to help you find and avoid potential return path issues. As you work, traces are color coded so you can quickly identify potent

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  • Real-Time Impedance Analysis

    Real-Time Impedance Analysis

    Easily and quickly identify impedance discontinuity issues visually, without simulation models or extensive signal integrity expertise.

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  • OrCAD is High-Speed PCB Design Done Right

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  • How To Maintain Connectivity in a Multiboard PCB System

    How To Maintain Connectivity in a Multiboard PCB System

    Bringing a multiboard system together is a chance for the designer to spread their wings. As the circuit spreads, so do the risk of crossed signals. Some of the ways the circuits can...

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  • Making the Little Things Count on Your PCB Design

    Making the Little Things Count on Your PCB Design

    Even as everything related to electronics shrinks in size, a few small areas that we have been able to ignore so far remain. Along with the physical reduction, we also encounter reductions in our...

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  • The Next Generation of DDR5 Is Near: Here’s How to Prepare

    The Next Generation of DDR5 Is Near: Here’s How to Prepare

    This past summer, Cadence and Micron teamed up to demo the first IP interface in silicon for a preliminary version of the DDR5-4400 IMC. The chip was fabricated with TSMC’s 7nm...

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  • Allegro - Return Path Vision1:48

    Allegro - Return Path Vision

    Managing your signal's return path is crucial to maintaining the signal integrity of your design. If you're not careful, a poorly managed return path will degrade the functionality of your circuit.

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  • Taking High Speed PCB Layout to the Next Level

    Taking High Speed PCB Layout to the Next Level

    The word from the boardroom is that high speed digital design begins to resemble RF work somewhere around the 1 GB/s. Anything that happens a thousand million times per second had better....

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  • Techniques to Reduce EMI In Your PCB Designs

    Techniques to Reduce EMI In Your PCB Designs

    Electromagnetic interference (EMI) is electromagnetic energy that disrupts the signaling and it's all around us.

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  • Lost in Transmission: Solving Common Issues in High-Speed Design

    Lost in Transmission: Solving Common Issues in High-Speed Design

    Creating a printed circuit board with high-speed design functionality is no small feat. The more complex a PCB design becomes, the higher the chances are of running into high-speed PCB design issues.

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  • Mixed Signal PCB Design Techniques

    Mixed Signal PCB Design Techniques

    The analog world in which we live is constantly being captured in one way or another, and the media is being shared globally. In between the creation and consumption of all of this data

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  • DDR Constraint Manager for OrCAD Wizard

    DDR Constraint Manager for OrCAD Wizard

    Routing DDR and high-speed bus interfaces can be one of the most daunting tasks in your design. With the new bus designer, all you need to do is simply describe the bus you are trying route and...

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  • Give me an L. Give me a T, Give me an E. What’s that spell? 4G!

    Give me an L. Give me a T, Give me an E. What’s that spell? 4G!

    The media darling of the season is the hot new 5G protocol. Of course, a large part of that ecosystem is vaporware or pre-5G demonstrations. We will be riding the 4G (LTE) wave at least for a while. I

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  • Allegro Return Path Vision

    Allegro Return Path Vision

    Easily identify nets with inconsistencies between the signal and return paths and quickly find the cause in real-ime while you design without waiting for the SI engineer to perform analysis and...

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  • On-Demand Webinar: Common High-speed Design Issues and How to Solve Them

    On-Demand Webinar: Common High-speed Design Issues and How to Solve Them

    Get help from the PCB design experts at EMA with the tips and tricks you need to achieve highspeed PCB design success.

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  • Allegro - Return Path Stitching Via1:48

    Allegro - Return Path Stitching Via

    Managing your signal's return path is crucial to maintaining the signal integrity of your design. If you're not careful, you might cross a split plane or jump reference planes in your design without n

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  • Notes from the Board Room: on Signal Integrity

    Notes from the Board Room: on Signal Integrity

    Signal Integrity is a make-or-break chunk of the design effort. Let's say that the last little bit of blue space on the board is right next to the RF receive chain. Let's further assume that at...

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  • How Network Latency Affects the Future of Autonomous Vehicles

    How Network Latency Affects the Future of Autonomous Vehicles

    According to data from the Boston Consulting Group, the market for connected/autonomous vehicles (CAVs) will grow to 42 billion USD by 2025. It is also expected that by 2020, 10 million...

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  • Notes from the Board Room - A day in the life of a Googler

    Notes from the Board Room - A day in the life of a Googler

    In my quest to become a world famous PCB designer, (stop laughing!) I've taken to putting my own words on the screen and sharing them here. My job is to enable design wins, period. It's a cruel...

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  • What is the Cost of Field Failures?

    What is the Cost of Field Failures?

    We see it in the news frequently; a battery explodes, car brakes malfunction, electronic systems are hacked, a material inexplicably fails. Field failures are costly and unforgiving, necessitating...

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